Space-Constrained Structures for HTM

Up to now, most of the research efforts to improve performance of programs based on hardware transactions were devoted to designing new hybrid transactional memories and transactional lock elision algorithms to speedup software fallback paths. Unfortunately hardware transactions remain insufficiently exploited, limited especially on microarchitectures where the access set is particularly limited, like the IBM Power8. By contrast, we propose a novel class of concurrent data structures, called space-constrained data structures, especially designed to boost programs based on hardware transactions. To illustrate our idea we propose a concurrent sorted tree with insertions and deletions of time complexity O(log logm) where m is the size of the key range. Preliminary experiments on the Synchrobench benchmark suite show that our space-constrained tree leads to a 5-fold speedup over a traditional red-black tree on a 10-core IBM Power8.